component top 
  word_length : generic integer = 8
  memory_depth: generic integer = 10
  T_IO        : generic type = bitvector(word_length)
  data_in     : in T_IO
  data_out    : out T_IO

type 
  T_num : signed(word_length)

constant 
  addr_bits: integer = ceil(log2(memory_depth))

register
  storage: array [memory_depth] of T_num = 0
  addr_counter: unsigned(addr_bits) = memory_depth - 1

begin
  if addr_counter == 0
     addr_counter = memory_depth - 1
  else
     addr_counter = addr_counter - 1
  end
  
  storage[addr_counter] = reinterpret(T_num, data_in) max storage[addr_counter]
  data_out = storage[addr_counter]
end