ArxBibix is currently working on a production version of Arx. Arx is a domain-specific hardware-description language meant to cut down the design time of signal-processing applications at the register-transfer level (RTL).
The strong point of Arx is its simplicity. All language constructs are meaningful which means that the entire language is synthesizable. The C-code generator in the Arx toolset optimizes for simulation speed. Because of the wide support for C, the generated C-code can be integrated into a multitude of simulation environments. Once satisfactory results are obtained in simulation, the Arx source code can be translated automatically into VHDL ready for ASIC or FPGA synthesis. The usual manual translation from C (or e.g. Matlab) into VHDL is no longer necessary. These concepts are illustrated below:
Additional key features of Arx:
- Signals are declared as either registers or wires. Clock and reset signals are implicit and are added by the code generators.
- Generic data types allow for fast and easy data-type refinement from floating point to fixed point.
- All fixed-point data types of SystemC are supported, while providing much faster simulation than SystemC.
Arx was developed as an academic tool by Klaas Hofstra. More about it can be read in the following publication:
Hofstra, K.L. and S.H. Gerez, "Arx: A Toolset for the Efficient Simulation and Direct Synthesis of High-Performance Signal Processing Algorithms", International Conference on High Performance Embedded Architectures and Compilers, Ghent, Belgium, (January 2007).
Do not hesitate to contact Bibix if you want to get involved in the further development of Arx. Become a strategic partner and obtain the opportunity to influence the future of Arx. Or, propose a pilot project to experience the power of Arx.